Invention Grant
- Patent Title: Lateral insulated-gate bipolar transistor and manufacturing method therefor
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Application No.: US15537753Application Date: 2015-09-28
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Publication No.: US10084073B2Publication Date: 2018-09-25
- Inventor: Shukun Qi
- Applicant: CSMC TECHNOLOGIES FAB1 CO., LTD.
- Applicant Address: CN Wuxi New District, Jiangsu
- Assignee: CSMC TECHNOLOGIES FAB1 CO., LTD.
- Current Assignee: CSMC TECHNOLOGIES FAB1 CO., LTD.
- Current Assignee Address: CN Wuxi New District, Jiangsu
- Agency: Hamre, Schumann, Mueller & Larson, P.C.
- Priority: CN201410799646 20141219
- International Application: PCT/CN2015/090914 WO 20150928
- International Announcement: WO2016/095585 WO 20160623
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L29/00 ; H01L29/739 ; H01L29/423 ; H01L21/265 ; H01L29/66 ; H01L21/225 ; H01L21/3065 ; H01L21/02 ; H01L21/762 ; H01L21/324

Abstract:
Provided is a lateral insulated-gate bipolar transistor (LIGBT), comprising a substrate (10), an anode terminal and a cathode terminal on the substrate (10), and a drift region (30) and a gate (61) located between the anode terminal and the cathode terminal. The anode terminal comprises a P-type buried layer (52) on the substrate (10), an N-type buffer region (54) on the P-type buried layer (52), and a P+ collector region (56) on the surface of the N-type buffer region (54). The LIGBT further comprises a trench gate adjacent to the anode terminal, wherein the trench gate penetrates from the surfaces of the N-type buffer region (54) and the P+ collector region (56) to the P-type buried layer (52), and the trench gate comprises an oxidation layer (51) on the inner surface of a trench and polysilicon (53) filled into the oxidation layer.
Public/Granted literature
- US20180069107A1 LATERAL INSULATED-GATE BIPOLAR TRANSISTOR AND MANUFACTURING METHOD THEREFOR Public/Granted day:2018-03-08
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