Invention Grant
- Patent Title: Thermal pads between stacked semiconductor dies and associated systems and methods
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Application No.: US15683336Application Date: 2017-08-22
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Publication No.: US10096579B2Publication Date: 2018-10-09
- Inventor: Jaspreet S. Gandhi , Michel Koopmans
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L25/065 ; H01L23/00 ; H01L25/00

Abstract:
Systems and methods are described for improved heat dissipation of the stacked semiconductor dies by including metallic thermal pads between the dies in the stack. In one embodiment, the thermal pads may be in direct contact with the semiconductor dies. Heat dissipation of the semiconductor die stack can be improved by a relatively high thermal conductivity of the thermal pads that directly contact the adjacent silicon dies in the stack without the intervening layers of the low thermal conductivity materials (e.g., passivation materials). In some embodiments, the manufacturing yield of the stack can be improved by having generally coplanar top surfaces of the thermal pads and under-bump metallization (UBM) structures.
Public/Granted literature
- US20170352645A1 THERMAL PADS BETWEEN STACKED SEMICONDUCTOR DIES AND ASSOCIATED SYSTEMS AND METHODS Public/Granted day:2017-12-07
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