Invention Grant
- Patent Title: Semiconductor device and manufacturing method thereof
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Application No.: US15630725Application Date: 2017-06-22
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Publication No.: US10103075B2Publication Date: 2018-10-16
- Inventor: Yoshiki Yamamoto , Tetsuya Yoshida , Koetsu Sawai
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Shapiro, Gabor and Rosenberger, PLLC
- Priority: JP2013-264390 20131220
- Main IPC: H01L23/58
- IPC: H01L23/58 ; H01L21/66 ; H01L21/84 ; H01L21/265 ; H01L21/768 ; H01L27/12 ; H01L23/535 ; H01L23/544 ; H01L27/11 ; G01R31/307

Abstract:
When VC inspection for a TEG is performed, it is easily detected whether any failure of a contact plug occurs or not by increasing an emission intensity of a contact plug, so that reliability of a semiconductor device is improved. An element structure of an SRAM is formed on an SOI substrate in a chip region. Also, in a TEG region, an element structure of an SRAM in which a contact plug is connected to a semiconductor substrate is formed on the semiconductor substrate exposed from an SOI layer and a BOX film as a TEG used for the VC inspection.
Public/Granted literature
- US20170287795A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2017-10-05
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