- 专利标题: Semiconductor memory with data line capacitive coupling
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申请号: US15865036申请日: 2018-01-08
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公开(公告)号: US10134467B2公开(公告)日: 2018-11-20
- 发明人: Jhon-Jhy Liaw
- 申请人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 申请人地址: TW Hsinchu
- 专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人地址: TW Hsinchu
- 代理机构: Maschoff Brennan
- 主分类号: G11C11/419
- IPC分类号: G11C11/419 ; G11C11/412 ; G11C11/00 ; G11C7/12
摘要:
A semiconductor memory is disclosed that includes a first data line, a first coupling line, and a second coupling line. The first coupling line is configured to capacitively couple the first coupling line with the first data line. The second coupling line is configured to capacitively couple the second coupling line with the first data line. The first data line and the first coupling line are formed in a first conductive layer, and the second coupling line is formed in a second conductive layer that is different from the first conductive layer.
公开/授权文献
- US20180130525A1 SEMICONDUCTOR MEMORY WITH DATA LINE CAPACITIVE COUPLING 公开/授权日:2018-05-10
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