- 专利标题: Dielectric liner added after contact etch before silicide formation
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申请号: US15490466申请日: 2017-04-18
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公开(公告)号: US10134731B2公开(公告)日: 2018-11-20
- 发明人: Tom Lii
- 申请人: Texas Instruments Incorporated
- 申请人地址: US TX Dallas
- 专利权人: TEXAS INSTRUMENTS INCORPORATED
- 当前专利权人: TEXAS INSTRUMENTS INCORPORATED
- 当前专利权人地址: US TX Dallas
- 代理商 Jacqueline J. Garner; Charles A. Brill; Frank D. Cimino
- 主分类号: H01L27/092
- IPC分类号: H01L27/092 ; H01L21/285 ; H01L21/8238 ; H01L29/423 ; H01L29/49 ; H01L29/51
摘要:
A method for forming MOS transistor includes providing a substrate including a semiconductor surface having a gate electrode on a gate dielectric thereon, dielectric spacers on sidewalls of the gate electrode, a source and drain in the semiconductor surface on opposing sides of the gate electrode, and a pre-metal dielectric (PMD) layer over the gate electrode and over the source and drain regions. Contact holes are formed through the PMD layer to form a contact to the gate electrode and contacts to the source and drain. A post contact etch dielectric layer is then deposited on the contacts to source and drain and on sidewalls of the PMD layer. The post contact etch dielectric layer is selectively removed from the contacts to leave a dielectric liner on sidewalls of the PMD layer. A metal silicide layer is formed on the contacts to the source and drain.
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