Invention Grant
- Patent Title: Method of fabricating tantalum nitride barrier layer and semiconductor device thereof
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Application No.: US15074991Application Date: 2016-03-18
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Publication No.: US10147799B2Publication Date: 2018-12-04
- Inventor: Chi-Cheng Hung , Yu-Sheng Wang , Weng-Cheng Chen , Hao-Han Wei , Ming-Ching Chung , Chi-Cherng Jeng
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW
- Agency: Cooper Legal Group, LLC
- Main IPC: H01L29/51
- IPC: H01L29/51 ; H01L29/78 ; H01L29/49 ; H01L29/40 ; H01L21/28 ; H01L21/285 ; H01L21/8238
Abstract:
A method of fabricating tantalum nitride barrier layer in an ultra low threshold voltage semiconductor device is provided. The method includes forming a high-k dielectric layer over a semiconductor substrate. Subsequently, a tantalum nitride barrier layer is formed on the high-k dielectric layer. The tantalum nitride barrier layer has a Ta:N ratio between 1.2 and 3. Next, a plurality of first metal gates is formed on the tantalum nitride barrier layer. The first metal gates are patterned, and then a second metal gate is formed on the tantalum nitride barrier layer.
Public/Granted literature
- US20170207316A1 METHOD OF FABRICATING TANTALUM NITRIDE BARRIER LAYER AND SEMICONDUCTOR DEVICE THEREOF Public/Granted day:2017-07-20
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