Invention Grant
- Patent Title: Method and apparatus for efficiently implementing the advanced encryption standard
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Application No.: US14881121Application Date: 2015-10-12
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Publication No.: US10148426B2Publication Date: 2018-12-04
- Inventor: Michael E. Kounavis , Shay Gueron , Ram Krishnamurthy , Sanu K. Mathew
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Nicholson De Vos Webster & Elliott LLP
- Main IPC: H04L9/06
- IPC: H04L9/06 ; G06F7/00 ; G06F9/30 ; G06F21/60 ; G06F9/38

Abstract:
Implementations of Advanced Encryption Standard (AES) encryption and decryption processes are disclosed. In one embodiment of S-box processing, a block of 16 byte values is converted, each byte value being converted from a polynomial representation in GF(256) to a polynomial representation in GF((22)4). Multiplicative inverse polynomial representations in GF((22)4) are computed for each of the corresponding polynomial representations in GF((22)4). Finally corresponding multiplicative inverse polynomial representations in GF((22)4) are converted and an affine transformation is applied to generate corresponding polynomial representations in GF(256). In an alternative embodiment of S-box processing, powers of the polynomial representations are computed and multiplied together in GF(256) to generate multiplicative inverse polynomial representations in GF(256). In an embodiment of inverse-columns-mixing, the 16 byte values are converted from a polynomial representation in GF(256) to a polynomial representation in GF((24)2). A four-by-four matrix is applied to the transformed polynomial representation in GF((24)2) to implement the inverse-columns-mixing.
Public/Granted literature
- US20160204938A1 METHOD AND APPARATUS FOR EFFICIENTLY IMPLEMENTING THE ADVANCED ENCRYPTION STANDARD Public/Granted day:2016-07-14
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