- 专利标题: Amplitude adjustment circuit, digital coherent receiver, and amplitude adjustment method
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申请号: US15726428申请日: 2017-10-06
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公开(公告)号: US10177855B2公开(公告)日: 2019-01-08
- 发明人: Masashi Sato , Kazuhiko Hatae , Nobukazu Koizumi , Yasuo Ohtomo , Masato Oota , Daisuke Sasaki , Yuya Imoto
- 申请人: FUJITSU LIMITED
- 申请人地址: JP Kawasaki
- 专利权人: FUJITSU LIMITED
- 当前专利权人: FUJITSU LIMITED
- 当前专利权人地址: JP Kawasaki
- 代理机构: Fujitsu Patent Center
- 优先权: JP2016-212660 20161031
- 主分类号: H04B10/60
- IPC分类号: H04B10/60 ; H04B10/61 ; H03K7/02 ; H04B10/2569 ; H04J14/06 ; H04L1/00 ; H04L25/03
摘要:
An amplitude adjustment circuit includes a memory that stores correspondence information between frequency distributions of an amplitude and adjustment coefficients, a processor configured to generate a frequency distribution of amplitude of data for which adaptive equalization processing has been executed, acquire the correspondence information between frequency distributions of the amplitude and adjustment coefficients from the memory, select the adjustment coefficient based on a result of comparison between the frequency distributions included in the correspondence information acquired by the acquiring unit and the frequency distribution generated by the generating unit, and adjust a gain of the data based on the adjustment coefficient selected by the selecting unit.
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