Invention Grant
- Patent Title: Cache and data organization for memory protection
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Application No.: US14661044Application Date: 2015-03-18
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Publication No.: US10185842B2Publication Date: 2019-01-22
- Inventor: Siddhartha Chhabra , Raghunandan Makaram , Jim McCormick , Binata Bhattacharyya
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Grossman, Tucker, Perreault & Pfleger, PLLC
- Main IPC: G06F21/79
- IPC: G06F21/79 ; G06F9/54 ; H04L9/08 ; H04L29/06

Abstract:
This disclosure is directed to cache and data organization for memory protection. Memory protection operations in a device may be expedited by organizing cache and/or data structure while providing memory protection for encrypted data. An example device may comprise processing module and a memory module. The processing module may include a memory encryption engine (MEE) to decrypt encrypted data loaded from the memory module, or to encrypt plaintext data prior to storage in the memory module, using security metadata also stored in the memory module. Example security metadata may include version (VER) data, memory authentication code (MAC) data and counter data. Consistent with the present disclosure, a cache associated with the MEE may be partitioned to separate the VER and MAC data from counter data. Data organization may comprise including the VER and MAC data corresponding to particular data in the same data line.
Public/Granted literature
- US20160275018A1 CACHE AND DATA ORGANIZATION FOR MEMORY PROTECTION Public/Granted day:2016-09-22
Information query