- 专利标题: Anti-pad for signal and power vias in printed circuit board
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申请号: US15660536申请日: 2017-07-26
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公开(公告)号: US10194524B1公开(公告)日: 2019-01-29
- 发明人: Il-Young Park , Jayanthi Natarajan
- 申请人: CISCO TECHNOLOGY, INC.
- 申请人地址: US CA San Jose
- 专利权人: Cisco Technology, Inc.
- 当前专利权人: Cisco Technology, Inc.
- 当前专利权人地址: US CA San Jose
- 代理商 Cindy Kaplan
- 主分类号: H05K1/02
- IPC分类号: H05K1/02 ; H05K1/11
摘要:
In one embodiment, an apparatus includes a plurality of layers in a printed circuit board comprising at least one power plane and at least one ground plane, and a plurality of vias extending through the plurality of layers and connecting two or more of the layers, the plurality of vias comprising at least one pair of differential signal vias and at least one pair of power vias, the signal vias and power vias surrounded by a plurality of ground vias. The ground plane includes an anti-pad formed therein by an opening defined by removal of material, with the pair of differential signal vias and pair of power vias extending through the anti-pad in the ground plane to reduce power via resonance.
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