Invention Grant
- Patent Title: Active matrix substrate
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Application No.: US15579177Application Date: 2016-06-02
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Publication No.: US10199233B2Publication Date: 2019-02-05
- Inventor: Tadayoshi Miyamoto , Fumiki Nakano
- Applicant: SHARP KABUSHIKI KAISHA
- Applicant Address: JP Sakai, Osaka
- Assignee: SHARP KABUSHIKI KAISHA
- Current Assignee: SHARP KABUSHIKI KAISHA
- Current Assignee Address: JP Sakai, Osaka
- Agency: ScienBiziP, P.C.
- Priority: JP2015-114074 20150604
- International Application: PCT/JP2016/066368 WO 20160602
- International Announcement: WO2016/195005 WO 20161208
- Main IPC: H01L21/3205
- IPC: H01L21/3205 ; H01L23/522 ; H01L21/768 ; H01L29/786 ; H01L27/146 ; H04N21/435 ; H04N21/439 ; H04N21/44 ; H04N21/462 ; H04N21/845 ; H01L23/532 ; H04N21/488

Abstract:
An active matrix substrate includes a substrate 31; gate lines arranged on the substrate 31 and extend in a first direction; source lines Si arranged on the substrate 31 and extend in a second direction that is different from the first direction; transistors 2 arranged in correspondence to points of intersection between the gate lines and the source lines, respectively, and are connected with the gate lines and the source lines; and an insulating layer. At least either the gate lines and the source lines are connected with electrodes of the transistors via contact holes in the insulating layer, and are formed to satisfy at least either i) having a greater film thickness or ii) being formed with a material having a smaller specific resistance, as compared with the electrodes of the transistors to which the lines are connected via the contact holes in the insulating layer.
Public/Granted literature
- US20180226266A1 ACTIVE MATRIX SUBSTRATE Public/Granted day:2018-08-09
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