An array substrate including a substrate, a plurality of gate lines and a plurality of data lines disposed on the substrate, which intersect to define a plurality of pixel units, a common electrode including a planar shape disposed above the pixel units, a plurality of strip slits are disposed within a region of the common electrode that corresponds to the pixel units, major axes of a plurality of the strip slits corresponding to the same row of pixel units are parallel to each other, extension lines of the major axes of the strip slits corresponding to a row of the pixel units intersect extension lines of the major axes of the strip slits corresponding to an adjacent row of the pixel units; wherein, a first angle is defined between the major axis of one of the strip slits and a direction perpendicular to the gate lines.