Invention Grant
- Patent Title: Method of forming via hole, array substrate and method of forming the same and display device
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Application No.: US15569759Application Date: 2017-03-22
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Publication No.: US10204802B2Publication Date: 2019-02-12
- Inventor: Zhidong Yuan
- Applicant: BOE TECHNOLOGY GROUP CO., LTD. , HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
- Applicant Address: CN Beijing CN Hefei, Anhui
- Assignee: BOE TECHNOLOGY GROUP CO., LTD.,HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
- Current Assignee: BOE TECHNOLOGY GROUP CO., LTD.,HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
- Current Assignee Address: CN Beijing CN Hefei, Anhui
- Agency: Kinney & Lange, P.A.
- Priority: CN201610266177 20160426
- International Application: PCT/CN2017/077646 WO 20170322
- International Announcement: WO2017/185921 WO 20171102
- Main IPC: H01L21/48
- IPC: H01L21/48 ; H01L21/02 ; G09G3/20 ; H01L21/4757 ; H01L21/475 ; H01L29/417 ; H01L21/77 ; H01L21/768 ; H01L21/47

Abstract:
The present disclosure provides a method of forming a via hole, an array substrate and a method of forming the same and a display device. The method of forming a via hole includes: forming a pattern of a first via hole and a pattern of an upper-part etched structure of a second via hole simultaneously on a base substrate through a first patterning process by using a first mask; forming a pattern of the second hole in a region corresponding to the formed pattern of the upper-part etched structure of the second via hole through a second patterning process by using a second mask.
Public/Granted literature
- US20180233379A1 METHOD OF FORMING VIA HOLE, ARRAY SUBSTRATE AND METHOD OF FORMING THE SAME AND DISPLAY DEVICE Public/Granted day:2018-08-16
Information query
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