Invention Grant
- Patent Title: Method and system for a low parasitic silicon high-speed phase modulator with intermittent P-and N-doped raised fingers
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Application No.: US16036409Application Date: 2018-07-16
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Publication No.: US10209540B2Publication Date: 2019-02-19
- Inventor: Ali Ayazi , Gianlorenzo Masini , Subal Sahni , Attila Mekis , Thierry Pinguet
- Applicant: Luxtera, Inc.
- Applicant Address: US CA Carlsbad
- Assignee: Luxtera, Inc.
- Current Assignee: Luxtera, Inc.
- Current Assignee Address: US CA Carlsbad
- Agency: McAndrews, Held & Malloy
- Main IPC: G02F1/025
- IPC: G02F1/025 ; G02F1/225 ; G02F1/21

Abstract:
Methods and systems for a low-parasitic silicon high-speed phase modulator are disclosed and may include fabricating an optical phase modulator that comprises a PN junction waveguide formed in a silicon layer, wherein the silicon layer may be on an oxide layer and the oxide layer may be on a silicon substrate. The PN junction waveguide may have p-doped and n-doped regions on opposite sides along a length of the PN junction waveguide, and portions of the p-doped and n-doped regions may be removed. Contacts may be formed on remaining portions of the p-doped and n-doped regions. Portions of the p-doped and n-doped regions may be removed symmetrically about the PN junction waveguide. Portions of the p-doped and n-doped regions may be removed in a staggered fashion along the length of the PN junction waveguide. Etch transition features may be removed along the p-doped and n-doped regions.
Public/Granted literature
- US20180321521A1 Method And System For A Low Parasitic Silicon High-Speed Phase Modulator Public/Granted day:2018-11-08
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