Provided is a display panel to which a dual gate transistor is applied. The display panel includes a substrate including a pixel area and a non-pixel area and a dual gate transistor disposed on the non-pixel area. The dual gate transistor includes first and second transistors which are connected in series and an auxiliary electrode which connects two gate electrodes of the first and second transistors. The auxiliary electrode is on a layer which is different from the gate electrode. Therefore, an area in which the dual gate transistor is formed is reduced and stability of the driving circuit is secured.