Invention Grant
- Patent Title: Manufacturing method of semiconductor package
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Application No.: US15625464Application Date: 2017-06-16
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Publication No.: US10224256B2Publication Date: 2019-03-05
- Inventor: Hirokazu Machida , Kazuhiko Kitano
- Applicant: J-DEVICES CORPORATION
- Applicant Address: JP Usuki, Oita
- Assignee: J-DEVICES CORPORATION
- Current Assignee: J-DEVICES CORPORATION
- Current Assignee Address: JP Usuki, Oita
- Agency: Hauptman Ham, LLP
- Priority: JP2016-121024 20160617
- Main IPC: H01L21/48
- IPC: H01L21/48 ; H01L23/14 ; H01L21/56 ; H01L23/31 ; H01L23/544 ; H01L23/552 ; H01L23/00 ; H01L23/538 ; H01L23/498

Abstract:
A manufacturing method of a semiconductor package includes etching a first surface and a side surface of a base substrate, the base substrate including the first, a second and the side surfaces positioned between the first and the second surfaces, the base substrate containing a metal, attaching a metal different from the metal contained in the base substrate to the first and the side surfaces, disposing a semiconductor device on the second surface, the semiconductor device having an external terminal, forming a resin insulating layer sealing the semiconductor device, forming a first conductive layer on the resin insulating layer, forming an opening, exposing the external terminal, in the first conductive layer and the resin insulating layer; and forming a metal layer on the first and the side surfaces, on the first conductive layer and in the opening.
Public/Granted literature
- US20170365534A1 MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE Public/Granted day:2017-12-21
Information query
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