Invention Grant
- Patent Title: Interconnect sharing with integrated control for reduced pinout
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Application No.: US14870770Application Date: 2015-09-30
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Publication No.: US10235324B2Publication Date: 2019-03-19
- Inventor: William E. Edwards , Jesse R. Beeker
- Applicant: FREESCALE SEMICONDUCTOR, INC.
- Applicant Address: US TX Austin
- Assignee: NXP USA, Inc.
- Current Assignee: NXP USA, Inc.
- Current Assignee Address: US TX Austin
- Main IPC: G06F13/16
- IPC: G06F13/16 ; G06F13/42 ; G06F13/40 ; G06F13/24

Abstract:
A method and apparatus provide an ability to selectively couple one of the output of the buffer or the output of the digital driver to a data terminal based upon a state of a storage location in which a stored first select indicator is stored and based upon a state of a selection signal. An external serial interface, at a semiconductor die, includes the data terminal, a selection terminal to receive the selection signal, and a clock terminal to receive a clock signal. A buffer includes an input to receive a secondary signal and an output to provide the secondary signal to the data terminal. A digital driver includes a digital output coupled to the data terminal. A first storage location has a storage state based upon the stored first select indicator. Select circuitry provides the selectively coupling.
Public/Granted literature
- US20170091139A1 INTERCONNECT SHARING WITH INTEGRATED CONTROL FOR REDUCED PINOUT Public/Granted day:2017-03-30
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