Invention Grant
- Patent Title: Avoid cache lookup for cold cache
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Application No.: US15488961Application Date: 2017-04-17
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Publication No.: US10241921B2Publication Date: 2019-03-26
- Inventor: Abhishek R. Appu , Altug Koker , Joydeep Ray , Prasoonkumar Surti , Kamal Sinha , Kiran C. Veernapu , Balaji Vembu
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Jeffrey, Watson, Mendonsa & Hamilton LLP
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F12/0888 ; G06F13/42 ; G06F13/40 ; G06T1/20

Abstract:
Methods and apparatus relating to techniques for avoiding cache lookup for cold cache. In an example, an apparatus comprises logic, at least partially comprising hardware logic, to receive, in a read/modify/write (RMW) pipeline, a cache access request from a requestor, wherein the cache request comprises a cache set identifier associated with requested data in the cache set, determine whether the cache set associated with the cache set identifier is in an inaccessible invalid state, and in response to a determination that the cache set is in an inaccessible state or an invalid state, to terminate the cache access request. Other embodiments are also disclosed and claimed.
Public/Granted literature
- US20180300251A1 AVOID CACHE LOOKUP FOR COLD CACHE Public/Granted day:2018-10-18
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