The invention provides a CMOS GOA circuit, which improves the NAND gate in the latch module and the inverter to connect the latch clock signal to the NAND gate in the latch module or the inverter to control the latch module to realize the input and latch of the cascade signal through the voltage change in the latch clock signal. Compared to the known technique, the present invention reduces the number of TFTs required by the latch module without affecting the normal operation of the circuit, and facilitates the implementation of the narrow border or borderless display products.