发明授权
- 专利标题: Array substrate motherboard, display panel motherboard, and fabricating method thereof
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申请号: US15519648申请日: 2016-11-07
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公开(公告)号: US10254602B2公开(公告)日: 2019-04-09
- 发明人: Jinhu Cao , Minghui Ma , Jiaxin Yu , Fengwu Yu , Bin Cao , Namin Kwon , Wei Li , Zhi Li , Xinlei Cao , Enke Guo
- 申请人: BOE TECHNOLOGY GROUP CO., LTD , BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
- 申请人地址: CN Beijing CN Beijing
- 专利权人: BOE TECHNOLOGY GROUP CO., LTD,BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
- 当前专利权人: BOE TECHNOLOGY GROUP CO., LTD,BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
- 当前专利权人地址: CN Beijing CN Beijing
- 代理机构: Anova Law Group, PLLC
- 优先权: CN201610165999 20160322
- 国际申请: PCT/CN2016/104896 WO 20161107
- 国际公布: WO2017/161893 WO 20170928
- 主分类号: G02F1/1345
- IPC分类号: G02F1/1345 ; H01L27/12 ; G09G3/00 ; G09G3/36 ; G02F1/1362
摘要:
In some embodiments, an array substrate motherboard and a fabricating method thereof are provided. The method includes: providing a substrate including multiple gate lines, gate driving leads, data lines, and data driving leads, each gate line corresponds to one gate driving lead, each data line corresponds to one data driving lead; forming multiple gate line testing leads, each gate line testing lead is connected with a gate driving lead; forming multiple data line testing leads, each data line testing lead is connected with a subset of the multiple data driving leads; forming multiple gate line testing pads, each gate line testing pad is connected with a gate line testing lead; forming multiple data line testing pads, each data line testing pad is connected with two data line testing leads; and using the gate line testing pads and gate line testing pads to test the gate lines and data lines.
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