Invention Grant
- Patent Title: Power management using duty cycles
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Application No.: US15471865Application Date: 2017-03-28
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Publication No.: US10254823B2Publication Date: 2019-04-09
- Inventor: Alain Artieri , Jean-Marie Tran
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Colby Nipper / Qualcomm
- Main IPC: G06F1/00
- IPC: G06F1/00 ; G06F1/3296 ; G06F1/324 ; H03K5/156 ; G06F1/18

Abstract:
An integrated circuit (IC) is disclosed herein for power management using duty cycles. In an example aspect, the integrated circuit includes multiple power domains, each of which includes a respective power state controller. The power state controller acts as a bridge between global supply lines of the integrated circuit and local supply lines of the respective power domain. Global supply lines can include a first global power rail, a second global power rail, and a global clock tree. Local supply lines can include a local power rail and a local clock tree. In operation, a power state controller adjusts a power state of the respective power domain in accordance with a duty cycle. A timeslot corresponding to the duty cycle can be separated into multiple time periods with durations of the time periods being based on the duty cycle.
Public/Granted literature
- US20180284878A1 Power Management Using Duty Cycles Public/Granted day:2018-10-04
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