Invention Grant
- Patent Title: Mixed-signal circuitry for computing weighted sum computation
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Application No.: US15890402Application Date: 2018-02-07
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Publication No.: US10255551B2Publication Date: 2019-04-09
- Inventor: David Alan Fick , Laura E. Fick , Skylar J. Skrzyniarz , Manar El-Chammas
- Applicant: The Regents of The University of Michigan , Mythic, Inc.
- Applicant Address: US MI Ann Arbor US TX Austin
- Assignee: The Regents of The University of Michigan,Mythic, Inc.
- Current Assignee: The Regents of The University of Michigan,Mythic, Inc.
- Current Assignee Address: US MI Ann Arbor US TX Austin
- Agency: Harness, Dickey & Pierce, P.L.C.
- Main IPC: G06N3/063
- IPC: G06N3/063 ; H03K5/24 ; G06N3/08

Abstract:
An integrated circuit and method are provided for performing weighted sum computations. The circuit includes: a plurality of current generators interconnected and arranged into pairs, a positive summation node, a negative summation node, and an input generation circuit. For each pair of current generators, the control terminal of each element is electrically connected to an input node. One of the current generators has its drain connected to the positive summation node while the other current generation element has its drain connected to the negative summation node. The remaining terminals on both current generators are connected to a reference, which may be shared. Each pair of current generator source predetermined amounts of current onto the two summation nodes when the following conditions occur: the input node is at an activation voltage, and the two summation nodes are at a predetermined target voltage.
Public/Granted literature
- US20180247192A1 Mixed-Signal Circuitry For Computing Weighted Sum Computation Public/Granted day:2018-08-30
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