- Patent Title: Gate-less electrostatic discharge systems and methods for forming
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Application No.: US15601141Application Date: 2017-05-22
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Publication No.: US10256225B2Publication Date: 2019-04-09
- Inventor: Maxim Klebanov , Washington Lamar
- Applicant: Allegro MicroSystems, LLC
- Applicant Address: US NH Manchester
- Assignee: Allegro MicroSystems, LLC
- Current Assignee: Allegro MicroSystems, LLC
- Current Assignee Address: US NH Manchester
- Agency: Daly, Crowley, Mofford & Durkee, LLP
- Main IPC: H01L27/02
- IPC: H01L27/02 ; H01L21/265 ; H01L21/762 ; H01L29/06 ; H01L29/87 ; H01L29/417 ; H01L29/78

Abstract:
A gate-less electrostatic discharge (ESD) protection device is provided that can be formed in various complementary metal-oxide-semiconductor (CMOS) systems. The gate-less ESD event protection device includes a substrate, a first doped region formed in the substrate, a second doped region extending into the first doped region, a third doped region extending into the first doped region, a first node formed over a portion of the second doped region and coupled to a source terminal and a second node formed over the third doped region and coupled to a drain terminal. The gate-less ESD protection devices can be formed such that no gate electrode is formed and the gate-less ESD protection device does not include a gate terminal. Thus, an operating voltage range of the gate-less ESD protection device is not limited by gate oxide degradation.
Public/Granted literature
- US20180337168A1 GATE-LESS ELECTROSTATIC DISCHARGE SYSTEMS AND METHODS FOR FORMING Public/Granted day:2018-11-22
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