Invention Grant
- Patent Title: Master-slave level shifter array architecture with pre-defined power-up states
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Application No.: US15448657Application Date: 2017-03-03
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Publication No.: US10256796B2Publication Date: 2019-04-09
- Inventor: Shih-Chieh Hsin , Med Nariman , Jingcheng Zhuang
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Haynes and Boone, LLP
- Main IPC: H03K3/3562
- IPC: H03K3/3562 ; H03K19/0185 ; H03K3/356

Abstract:
A master-slave level shifter array includes an asymmetric master level shifter having a predefined output state that produces an enable signal to drive an array of symmetric slave level shifters during a power collapse. As a result, the slave level shifter array has a reliable output state during a power collapse, while also providing wafer area savings due to their small symmetric characteristics.
Public/Granted literature
- US20180254772A1 MASTER-SLAVE LEVEL SHIFTER ARRAY ARCHITECTURE WITH PRE-DEFINED POWER-UP STATES Public/Granted day:2018-09-06
Information query
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