- 专利标题: Method and apparatus to enable individual non volatile memory express (NVME) input/output (IO) Queues on differing network addresses of an NVME controller
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申请号: US14976949申请日: 2015-12-21
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公开(公告)号: US10275160B2公开(公告)日: 2019-04-30
- 发明人: James P. Freyensee , Phil C. Cayton , Dave B. Minturn , Jay E. Sternberg
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Spectrum IP Law Group LLC
- 主分类号: G06F3/06
- IPC分类号: G06F3/06
摘要:
Methods and apparatus related to enabling individual NVMe (Non-Volatile Memory express) IO (Input Output or I/O) queues on differing network addresses of an NVMe controller are described. In one embodiment, a plurality of backend controller logic is coupled to a plurality of non-volatile memory devices. One or more virtual controller target logic (coupled to the plurality of backend controller logic) transmit data from a first portion of a plurality of IO queues to a first backend controller logic of the plurality of the backend controller logic. The one or more virtual controller target logic transmit data from a second portion of the plurality of IO queues to a second backend controller logic of the plurality of backend controller logic. Other embodiments are also disclosed and claimed.
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