- 专利标题: Layout design for manufacturing a memory cell
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申请号: US15453976申请日: 2017-03-09
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公开(公告)号: US10276579B2公开(公告)日: 2019-04-30
- 发明人: Hidehiro Fujiwara , Hung-Jen Liao , Hsien-Yu Pan , Yen-Huei Chen
- 申请人: Taiwan Semiconductor Manufacturing Company Limited
- 申请人地址: TW Hsinchu
- 专利权人: Taiwan Semiconductor Manufacturing Company Limited
- 当前专利权人: Taiwan Semiconductor Manufacturing Company Limited
- 当前专利权人地址: TW Hsinchu
- 代理机构: Jones Day
- 主分类号: G11C5/06
- IPC分类号: G11C5/06 ; H01L27/11 ; G11C11/419 ; H01L21/8234 ; H01L23/528 ; H01L27/02 ; G11C11/412 ; G11C11/418
摘要:
Arrays of static random access memory (SRAM) cells and methods of fabricating the same are provided. A first communication path is disposed a first distance from an edge of the array and is operable to control access to SRAM cells of a first row of the array for write operations. A second communication path is disposed a second distance from the edge of the array and is operable to control access to SRAM cells of a second row of the array for write operations. The second distance is different than the first distance. A first conductive structure is disposed a third distance from the edge of the array and is operable to control access to the SRAM cells of the first row for read operations. A second conductive structure is disposed the third distance from the edge of the array and is operable to control access to the SRAM cells of the second row for read operations.
公开/授权文献
- US20170271342A1 Layout Design for Manufacturing a Memory Cell 公开/授权日:2017-09-21
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