Invention Grant
- Patent Title: Isolation manufacturing method for semiconductor structures
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Application No.: US15628345Application Date: 2017-06-20
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Publication No.: US10283414B2Publication Date: 2019-05-07
- Inventor: I-Sheng Chen , Tzu-Chiang Chen , Chih-Sheng Chang , Cheng-Hsien Wu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L21/762 ; H01L27/088 ; H01L29/06

Abstract:
A method of forming a semiconductor device includes providing a semiconductor structure that includes a first semiconductor material extending from a first region to a second region. The method further includes removing a portion of the first semiconductor material in the second region to form a recess, where the recess exposes a sidewall of the first semiconductor material disposed in the first region; forming a dielectric material covering the sidewall; while the dielectric material covers the sidewall, epitaxially growing a second semiconductor material in the second region adjacent the dielectric material; and forming a first fin including the first semiconductor material and a second fin including the second semiconductor material.
Public/Granted literature
- US20180366375A1 Isolation Manufacturing Method for Semiconductor Structures Public/Granted day:2018-12-20
Information query
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