- 专利标题： Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 2/15 and 1024-symbol mapping, and bit interleaving method using same
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申请号： US14664707申请日： 2015-03-20
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公开(公告)号： US10298268B2公开(公告)日： 2019-05-21
- 发明人: Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
- 申请人： Electronics and Telecommunications Research Institute
- 申请人地址： KR Daejeon
- 专利权人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
- 当前专利权人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
- 当前专利权人地址： KR Daejeon
- 优先权： KR10-2015-0023411 20150216
- 主分类号： H03M13/00
- IPC分类号： H03M13/00 ; H03M13/27 ; H03M13/11 ; H03M13/25 ; G06F11/10 ; G11B20/18
摘要：
A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 1024-symbol mapping.
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