An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may be configured to process a plurality of input/output requests to read/write to/from the memory. The controller generally includes a processor, a cache and a hardware assist circuit. The processor may be configured to initiate a recycle operation by generation of a start index. The cache may be configured to buffer a first level of a map and less than all of a second level of the map. The hardware assist circuit may be configured to search through the first level or any portions of the second level of the map in the cache in response to the start index, and notify the processor in response to the search detecting one or more blocks in the memory that contain valid data to be recycled.