Invention Grant
- Patent Title: System on package architecture including structures on die back side
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Application No.: US15476872Application Date: 2017-03-31
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Publication No.: US10304804B2Publication Date: 2019-05-28
- Inventor: Fay Hua , Telesphor Kamgaing , Johanna M. Swan
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Konrad Raynes Davda & Victor LLP
- Agent Alan S. Raynes
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/00 ; H01L23/29 ; H01L21/02 ; H01L25/00 ; H01L23/31 ; H01L23/48 ; H01L23/66 ; H01L23/64

Abstract:
Embodiments include devices and methods, including a device including a substrate comprising a semiconductor, the substrate including a front side comprising active elements and a backside opposite the front side. The device includes a dielectric layer on the backside, and a passive component on the dielectric layer on the backside. In certain embodiments, the passive device is formed on a self-assembled monolayer (SAM). Other embodiments are described and claimed.
Public/Granted literature
- US20180286834A1 SYSTEM ON PACKAGE ARCHITECTURE INCLUDING STRUCTURES ON DIE BACK SIDE Public/Granted day:2018-10-04
Information query
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