Invention Grant
- Patent Title: Power semiconductor device with dV/dt controllability and cross-trench arrangement
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Application No.: US15989778Application Date: 2018-05-25
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Publication No.: US10304952B2Publication Date: 2019-05-28
- Inventor: Matteo Dainese , Alexander Philippou , Markus Bina , Ingo Dirnstorfer , Erich Griebl , Christian Jaeger , Johannes Georg Laven , Caspar Leendertz , Frank Dieter Pfirsch
- Applicant: Infineon Technologies AG , Infineon Technologies Dresden GmbH
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Murphy, Bilak & Homiller, PLLC
- Priority: DE102017111595 20170529
- Main IPC: H01L29/00
- IPC: H01L29/00 ; H01L29/739 ; H01L29/06 ; H01L29/10 ; H01L29/40 ; H01L29/66 ; H01L29/423

Abstract:
A power semiconductor device includes an active region surrounded by an inactive termination region each formed by part of a semiconductor body. The active region conducts load current between first and second load terminals. At least one power cell has trenches extending into the semiconductor body adjacent to each other along a first lateral direction and having a stripe configuration that extends along a second lateral direction into the active region. The trenches spatially confine a plurality of mesas each having at least one first type mesa electrically connected to the first load terminal and configured to conduct at least a part of the load current, and at least one second type mesa configured to not conduct the load current. A decoupling structure separates at least one of the second type mesas into a first section in the active region and a second section in the termination region.
Public/Granted literature
- US20180342605A1 Power Semiconductor Device with dV/dt Controllability and Cross-Trench Arrangement Public/Granted day:2018-11-29
Information query
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