A first transistor has a first conduction terminal coupled to a second bit line, a second conduction terminal coupled to a bit line node, and a control terminal biased by a second control signal. A second transistor has a first conduction terminal coupled to a second complementary bit line, a second conduction terminal coupled to a complementary bit line node, and a control terminal biased by the second control signal. A first replica transistor has a first conduction terminal coupled to the second bit line, a second conduction terminal coupled to the complementary bit line node, and a control terminal biased such that the first replica transistor is off. A second replica transistor has a first conduction terminal coupled to the second complementary bit line, a second conduction terminal coupled to the bit line node, and a control terminal biased such that the second replica transistor is off.