First and second element pairs formed by connecting FWDs and MOSFETs in antiparallel are connected in series and sealed by resin to configure a core module. In the core module, a first drain electrode, a first source electrode, a second drain electrode, and a second source electrode are exposed to the surface. A cover with terminals is put on the core module. At this time, each of the direct-current positive electrode terminal, the direct-current negative electrode terminal, and the alternating-current terminal of the cover with terminals is electrically connected to each of the first drain electrode, the second source electrode, and the first source electrode and the second drain electrode.