Systems and methods for supporting SMA level abstractions at router ports for GRH to LRH mapping tables in a high performance computing environment. Ingress port mapping of GRH to new LRH can be reduced to minimally include DGID to DLID mapping. By further reducing the complexity by assuming all packets received at a subnet are addressed to a correct subnet (and also taking into account that correct subnet destination can be checked independently of the individual mapping entries), the DGID address can be simplified to a DGUID address, allowing for additional mappings within a same memory size.