Invention Grant
- Patent Title: Testing impedance adjustment
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Application No.: US15904660Application Date: 2018-02-26
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Publication No.: US10348527B2Publication Date: 2019-07-09
- Inventor: Qiang Tang , Xiaojiang Guo , Chang Wan Ha
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dicke, Billig & Czaja, PLLC
- Main IPC: G11C7/00
- IPC: G11C7/00 ; H04L25/02 ; G06F13/40 ; G11C5/04 ; G11C29/02 ; G11C29/50

Abstract:
Methods of operating integrated circuit devices include generating a voltage level at a particular node in response to a first voltage level applied to a termination device and a second voltage level applied to a reference resistance; determining whether a plurality of available resistance values of the termination device satisfy a criterion that each available resistance value is either less than a resistance value of the reference resistance, or each available resistance value is greater than the resistance value of the reference resistance; and, when the plurality of available resistance values of the termination device satisfy the criterion, determining whether a voltage level generated at the particular node for a particular available resistance value of the plurality of available resistance values is between a voltage level of a first reference voltage and a voltage level of a second reference voltage.
Public/Granted literature
- US20180191528A1 TESTING IMPEDANCE ADJUSTMENT Public/Granted day:2018-07-05
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