- Patent Title: Co-integration of tensile silicon and compressive silicon germanium
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Application No.: US16027707Application Date: 2018-07-05
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Publication No.: US10354927B2Publication Date: 2019-07-16
- Inventor: Nicolas Loubet , Pierre Morin , Yann Mignot
- Applicant: STMicroelectronics, Inc.
- Applicant Address: US TX Coppell
- Assignee: STMicroelectronics, Inc.
- Current Assignee: STMicroelectronics, Inc.
- Current Assignee Address: US TX Coppell
- Agency: Seed Intellectual Property Law Group LLP
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L21/8238 ; H01L29/165 ; H01L21/02 ; H01L21/762 ; H01L29/49 ; H01L29/78 ; H01L29/06 ; H01L29/417
Abstract:
Integrated circuits are disclosed in which the strain properties of adjacent pFETs and nFETs are independently adjustable. The pFETs include compressive-strained SiGe on a silicon substrate, while the nFETs include tensile-strained silicon on a strain-relaxed SiGe substrate. Adjacent n-type and p-type FinFETs are separated by electrically insulating regions formed by a damascene process. During formation of the insulating regions, the SiGe substrate supporting the n-type devices is permitted to relax elastically, thereby limiting defect formation in the crystal lattice of the SiGe substrate.
Public/Granted literature
- US20180315666A1 CO-INTEGRATION OF TENSILE SILICON AND COMPRESSIVE SILICON GERMANIUM Public/Granted day:2018-11-01
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