Invention Grant
- Patent Title: Vertical transistors with sidewall gate air gaps and methods therefor
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Application No.: US16016219Application Date: 2018-06-22
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Publication No.: US10355129B2Publication Date: 2019-07-16
- Inventor: Chao Feng Yeh , TianChen Dong
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: US TX Addison
- Assignee: SanDisk Technologies LLC
- Current Assignee: SanDisk Technologies LLC
- Current Assignee Address: US TX Addison
- Agency: Vierra Magen Marcus LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L27/11582 ; H01L27/1157 ; H01L29/06 ; H01L23/528 ; H01L27/24 ; H01L45/00 ; H01L27/22

Abstract:
A method is provided that includes forming a first vertically-oriented transistor above a substrate, the first vertically-oriented transistor comprising a first sidewall gate disposed in a first direction, forming a second vertically-oriented transistor above the substrate, the second vertically-oriented transistor including a second sidewall gate disposed in the first direction, and forming an air gap chamber above the substrate disposed between the first sidewall gate and the second sidewall gate, and extending in the first direction, the air gap chamber including an air gap.
Public/Granted literature
- US20180301556A1 VERTICAL TRANSISTORS WITH SIDEWALL GATE AIR GAPS AND METHODS THEREFOR Public/Granted day:2018-10-18
Information query
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