Error correction circuit, operating method thereof and data storage device including the same
Abstract:
An error correction circuit includes a control unit suitable for receiving a data chunk including a plurality of data blocks, each of the data blocks being included in a corresponding codeword of a first direction and a corresponding codeword of a second direction; and a decoder suitable for performing a decoding operation on a codeword, which is selected by the control unit, in the data chunk, wherein the control unit calculates a first reference value by applying a correction capability value of the first direction to a flag of the first direction, calculates a second reference value by applying a correction capability value of the second direction to a flag of the second direction, selects a priority direction from the first direction and the second direction based on the first reference value and the second reference value, and preferentially selects codewords of the priority direction for decoding operations.
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