Invention Grant
- Patent Title: Methods of forming a semiconductor structure and methods of forming isolation structures
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Application No.: US15982872Application Date: 2018-05-17
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Publication No.: US10381218B1Publication Date: 2019-08-13
- Inventor: Gurtej S. Sandhu
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L21/76
- IPC: H01L21/76 ; H01L21/02 ; H01L21/762

Abstract:
A method of reducing silicon consumption of a silicon material. The method comprises cleaning a silicon material and subjecting the cleaned silicon material to a vacuum anneal at a temperature below a melting point of silicon and under vacuum conditions. The silicon material is subjected to additional process acts without substantially removing silicon of the silicon material. Additional methods of forming a semiconductor structure and forming isolation structures are also disclosed.
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