A memory system according to example embodiments of the inventive concept may include a storage device and a memory device. The storage device includes a first interface circuit configured to be connected to a processor and a second interface circuit different from the first interface circuit. The memory device includes a third interface circuit configured to be connected to the processor based on a DRAM interface, a fourth interface circuit configured to be different from the third interface circuit and configured to be connected to the second interface circuit, and a random access memory divided into a first memory area and a second memory area. The first memory area is accessed by the processor through the third interface circuit and the second memory area is accessed by the storage device through the second interface circuit and the fourth interface circuit.