- Patent Title: Accelerating memory fault resolution by performing fast re-fetching
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Application No.: US15831195Application Date: 2017-12-04
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Publication No.: US10402263B2Publication Date: 2019-09-03
- Inventor: Zeev Sperber , Stanislav Shwartsman , Jared W. Stark, IV , Lihu Rappoport , Igor Yanover , George Leifman
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Nicholson De Vos Webster & Elliott LLP
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/07 ; G06F12/02 ; G06F9/38 ; G06F9/30

Abstract:
A method for handling load faults in an out-of-order processor is described. The method includes detecting, by a memory ordering buffer of the out-of-order processor, a load fault corresponding to a load instruction that was executed out-of-order by the out-of-order processor; determining, by the memory ordering buffer, whether instant reclamation is available for resolving the load fault of the load instruction; and performing, in response to determining that instant reclamation is available for resolving the load fault of the load instruction, instant reclamation to re-fetch the load instruction for execution prior to attempting to retire the load instruction.
Public/Granted literature
- US20190171515A1 ACCELERATING MEMORY FAULT RESOLUTION BY PERFORMING FAST RE-FETCHING Public/Granted day:2019-06-06
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