Invention Grant
- Patent Title: Fabrication method of electronic package
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Application No.: US15866144Application Date: 2018-01-09
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Publication No.: US10403567B2Publication Date: 2019-09-03
- Inventor: Yan-Heng Chen , Chun-Tang Lin , Mu-Hsuan Chan , Chieh-Yuan Chi
- Applicant: Siliconware Precision Industries Co., Ltd.
- Applicant Address: TW Taichung
- Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee Address: TW Taichung
- Agency: Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW103135624A 20141015
- Main IPC: H01L21/48
- IPC: H01L21/48 ; H01L23/498 ; H01L23/538 ; H01L23/00 ; H01L25/10 ; H01L25/00 ; H01L21/56

Abstract:
A method for fabricating an electronic package is provided, which includes the steps of: providing an insulating layer having at least an electronic element embedded therein; forming at least a first via hole on one side of the insulating layer; forming a first conductor in the first via hole of the insulating layer; forming on the insulating layer a first circuit structure electrically connected to the electronic element and the first conductor; and forming a second via hole on the other side of the insulating layer, wherein the second via hole communicates with the first via hole. As such, the second via hole and the first via hole constitute a through hole. Since the through hole is fabricated through two steps, the aspect ratio (depth/width) of the through hole can be adjusted according to the practical need so as to improve the process yield.
Public/Granted literature
- US20180130727A1 FABRICATION METHOD OF ELECTRONIC PACKAGE Public/Granted day:2018-05-10
Information query
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