Invention Grant
- Patent Title: Circuit layout, layout method and system for implementing the method
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Application No.: US14527381Application Date: 2014-10-29
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Publication No.: US10403621B2Publication Date: 2019-09-03
- Inventor: Shou-En Liu , Chun-Wei Chang , Bi-Ling Lin , Yung-Sheng Tsai , Jiaw-Ren Shih
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- Main IPC: H01L27/02
- IPC: H01L27/02 ; H01L29/423 ; H01L27/092 ; H01L27/088

Abstract:
A circuit layout includes a first device having a first set of fingers, wherein the first set of fingers is separated into a first finger group and a second finger group, the first finger group comprising a first number of fingers, and the second finger group comprising a second number of fingers. The circuit layout further includes a second device having a second set of fingers, wherein the second set of fingers includes a third finger group having a third number of fingers. The first finger group, the second finger group and the third finger group extend across a first doped region, and the third finger group is between the first finger group and the second finger group.
Public/Granted literature
- US20160126232A1 CIRCUIT LAYOUT, LAYOUT METHOD AND SYSTEM FOR IMPLEMENTING THE METHOD Public/Granted day:2016-05-05
Information query
IPC分类: