Invention Grant
- Patent Title: Vertical memory devices and methods of manufacturing the same
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Application No.: US15610923Application Date: 2017-06-01
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Publication No.: US10403638B2Publication Date: 2019-09-03
- Inventor: Joon-Suk Lee , Hong-Suk Kim , Jae-Young Ahn , Han-Jin Lim
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Lee & Morse, P.C.
- Priority: KR10-2016-0144173 20161101
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L29/66 ; H01L29/78 ; H01L27/1157 ; H01L27/11582

Abstract:
A vertical memory device includes a first structure having a lower semiconductor pattern structure filling a recess on a substrate and protruding from an upper surface of the substrate in a first direction substantially perpendicular to the upper surface of the substrate, the lower semiconductor pattern structure including a first undoped semiconductor pattern, a doped semiconductor pattern, and a second undoped semiconductor pattern sequentially stacked, and a lower surface of the doped semiconductor pattern being lower than the upper surface of the substrate, and an upper semiconductor pattern extending in the first direction on the lower semiconductor pattern structure, and a plurality of gate electrodes surrounding a sidewall of the first structure, the plurality of gate electrodes being at a plurality of levels, respectively, so as to be spaced apart from each other in the first direction.
Public/Granted literature
- US20180122822A1 VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME Public/Granted day:2018-05-03
Information query
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