Invention Grant
- Patent Title: Security protection of terabit ethernet PCS layer using alignment markers
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Application No.: US15712385Application Date: 2017-09-22
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Publication No.: US10404402B2Publication Date: 2019-09-03
- Inventor: Gilberto Loprieno , Emanuele Umberto Giacometti , Davide Codella
- Applicant: Cisco Technology, Inc.
- Applicant Address: US CA San Jose
- Assignee: Cisco Technology, Inc.
- Current Assignee: Cisco Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Edell, Shapiro & Finnan, LLC
- Main IPC: H04L1/00
- IPC: H04L1/00 ; H04J14/02 ; H04B10/61 ; H03M13/33 ; H03M13/03

Abstract:
A method generates, from an input data stream, multiple lanes of a physical coding sublayer (PCS) signal. The method converts the data stream to a sequence of bit blocks, and periodically inserts into the sequence of bit blocks an alignment marker (AM) group including multiple individual alignment markers for respective ones of the multiple lanes. The method adds security protection to each bit block according to a security protocol to produce a sequence of protected bit blocks, and modifies each AM group with security information to be used by the security protocol to remove the security protection added to the sequence of protected bit blocks. The method applies forward error correction to the sequence of protected bit blocks and the modified AM groups to produce forward error correction codewords, and produces the multiple lanes from the codewords. The method transmits the multiple lanes over an optical link.
Public/Granted literature
- US20190097748A1 SECURITY PROTECTION OF TERABIT ETHERNET PCS LAYER USING ALIGNMENT MARKERS Public/Granted day:2019-03-28
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