Invention Grant
- Patent Title: Standard cell architecture with at least one gate contact over an active area
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Application No.: US15802956Application Date: 2017-11-03
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Publication No.: US10424576B2Publication Date: 2019-09-24
- Inventor: Albert M. Chu , Myung-Hee Na , Ravikumar Ramachandran
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Vazken Alexanian
- Main IPC: G06F17/50
- IPC: G06F17/50 ; H01L27/02 ; H01L27/118

Abstract:
A method is presented for forming a layout of a MOSFET (metal oxide semiconductor field effect transistor) circuit. The method includes forming a plurality of gate conductors, forming a plurality of active areas, and forming at least one gate contact (CB contact) within an active region of the plurality of active regions. The method further includes placing a marker over the at least one gate contact to identify a location of the at least one gate contact. Additionally, a distance between the at least one gate contact and at least one TS contact is optimized based on device specifications.
Public/Granted literature
- US20180211948A1 STANDARD CELL ARCHITECTURE WITH AT LEAST ONE GATE CONTACT OVER AN ACTIVE AREA Public/Granted day:2018-07-26
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