Invention Grant
- Patent Title: Method of manufacturing semiconductor device
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Application No.: US16232371Application Date: 2018-12-26
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Publication No.: US10424637B2Publication Date: 2019-09-24
- Inventor: Shuhei Tatemichi , Shunji Takenoiri
- Applicant: FUJI ELECTRIC CO., LTD.
- Applicant Address: JP Kawasaki-Shi, Kanagawa
- Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee Address: JP Kawasaki-Shi, Kanagawa
- Agency: Rabin & Berdo, P.C.
- Priority: JP2016-163158 20160823
- Main IPC: H01L21/265
- IPC: H01L21/265 ; H01L29/06 ; H01L29/78 ; H01L29/32 ; H01L29/66 ; H01L29/739

Abstract:
A method of manufacturing a semiconductor device that includes a semiconductor layer of a first conductivity type, and a parallel pn layer formed on the semiconductor layer, the pn layer having first semiconductor regions of the first conductivity type and second semiconductor regions of a second conductivity type, the first and second regions being alternately arranged parallel to a surface of the semiconductor layer. In one embodiment, the method includes repeatedly performing the following steps to stack the epitaxial growth layers on the semiconductor layer to form the pn layer: forming an epitaxial growth layer of the first conductivity type or non-doped, the epitaxial growth layer having an impurity concentration lower than that of the semiconductor layer, ion implanting a first-conductivity-type impurity into the epitaxial growth layer, selectively ion implanting a second-conductivity-type impurity into the epitaxial growth layer and ion implanting a group 18 element into the epitaxial growth layer.
Public/Granted literature
- US20190131391A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2019-05-02
Information query
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