Invention Grant
- Patent Title: Semiconductor device and method of manufacturing the semiconductor device
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Application No.: US15690233Application Date: 2017-08-29
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Publication No.: US10424665B2Publication Date: 2019-09-24
- Inventor: Shinichi Okamoto , Tsutomu Okazaki
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Shapiro, Gabor and Rosenberger, PLLC
- Priority: JP2016-211436 20161028
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L27/088 ; H01L21/8234

Abstract:
There is improved performance of a semiconductor device including a fin-type low-withstand-voltage transistor and a fin-type high-withstand-voltage transistor. A low-withstand-voltage transistor is formed on each of a plurality of first fins isolated from each other by a first element isolation film, and a high-withstand-voltage transistor, which has a channel region including tops and side surfaces of a plurality of second fins and a top of a semiconductor substrate between the second fins adjacent to each other, is formed. At this time, a top of a second element isolation film surrounding the second fins including part of the channel region of one high-withstand-voltage transistor is lower than a top of the first element isolation film.
Public/Granted literature
- US20180122930A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE Public/Granted day:2018-05-03
Information query
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