Logic encryption using on-chip memory cells
Abstract:
A protected circuit includes a logic circuit having one or more input nodes and one or more output nodes. The logic circuit has a network of logic elements and one or more logic encryption elements. A logic encryption element includes a memory cell, such as a correlated electron switch for example, coupled with a configurable sub-circuit that is configured by a value stored in the memory cell to encrypt a signal or a signal path. A mapping of values at the one or more input nodes to values at the one or more output nodes corresponds to a desired mapping when values stored in the one or more memory cells match component values of a prescribed key vector. The memory cells may be programmed after fabrication of the circuit.
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