Invention Grant
- Patent Title: Non-volatile memory allowing a high integration density
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Application No.: US15977357Application Date: 2018-05-11
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Publication No.: US10446564B2Publication Date: 2019-10-15
- Inventor: Jean-Michel Portal , Marios Barlas , Laurent Grenouillet , Elisa Vianello
- Applicant: Commissariat a l'energie atomique et aux energies alternatives , Universite d'Aix-Marseille
- Applicant Address: FR Paris FR Marseilles
- Assignee: Commissariat a l'energie atomique et aux energies alternatives,Universite d'Aix-Marseille
- Current Assignee: Commissariat a l'energie atomique et aux energies alternatives,Universite d'Aix-Marseille
- Current Assignee Address: FR Paris FR Marseilles
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: FR1754181 20170512
- Main IPC: H01L27/115
- IPC: H01L27/115 ; H01L27/11524 ; H01L45/00 ; H01L27/24

Abstract:
The invention relates to a non-volatile memory that comprises selection transistors. Each selection transistor includes a layer of semiconductor material with a channel region and conduction electrodes, a gate stack including a gate electrode and a gate insulator, an isolation trench between the transistors, a storage structure of the RRAM type comprising a control electrode, and a dielectric layer formed under the control electrode and in the same material as the gate insulator, comprising a central part directly above the isolation trench and ends extending directly above conduction electrodes, and configured so as to form conducting filaments. The said storage structure and the said selection transistors are formed in the same pre-metallization layer.
Public/Granted literature
- US20180331115A1 NON-VOLATILE MEMORY ALLOWING A HIGH INTEGRATION DENSITY Public/Granted day:2018-11-15
Information query
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